Evaluation of a Timing Integrated Circuit Architecture for Continuous Crystal and SiPM Based PET Systems

Research areas:
Authors:
Monzo, J. M.; Ros, A.; Bosch, V. Herrero; Perino, I. V.; Aliaga, R. J.; Gadea-Girones, R.; Colom-Palero, R. J.
Year:
Type of Publication:
Journal:
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Month:
2013
Article
JINST
8
March

 Abstract:

Improving timing resolution in positron emission tomography (PET), thus having fine time information of the detected pulses, is important to increase the reconstructed images signal to noise ratio (SNR). Through the present work, an integrated circuit topology for time extraction of the incoming pulses is evaluated. An accurate simulation including the detector physics and the electronics with different configurations has been developed. The selected integrated circuit topology will be implemented using CMOS 0.35µm AMS process. The selected architecture is intended for a PET system based on continuous scintillation crystal attached to a SiPM array. The integrated circuit extracts the time stamp from the first few photons generated when the gamma-ray interacts with the scintillator, thus obtaining the best time resolution. To get the time stamp from the detected pulses, a time to digital converter (TDC) array based architecture has been proposed. The TDC input stage uses a current comparator to transform the analog signal into a digital signal. Individually configurable trigger levels allow us to avoid false triggers due to signal noise. Using a TDC per SiPM configuration results in a very area consuming integrated circuit. One solution to this problem is to joint several SiPM outputs to one TDC. This reduces the number of TDCs but, on the other hand, the first photons will be more difficult to be detected. For this reason, it is important to simulate how the time resolution is degraded when the number of TDCs is reduced. Following this criteria, the best configuration will be selected considering the trade-off between achievable time resolution and the cost per chip. A simulation is presented that uses Geant4 for high energy physics and, for the electronic blocks, SPICE and Matlab. The Geant4 stage simulates the gamma-ray interaction with the scintillator, the photon shower generation and the first stages of the SiPM. The electronics simulation includes an electrical model of the SiPM array and all the integrated circuitry that generates the time stamps. Time resolution results are analyzed using Matlab. The simulation takes into account different noise sources including flicker and thermal noise and clock jitter. The goal is to analyze the best resolution achievable with the SiPM and its degradation due to different circuitry configurations.